void-packages/srcpkgs/yosys/template

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# Template file for 'yosys'
pkgname=yosys
version=0.9
revision=2
wrksrc=${pkgname}-${pkgname}-${version}
build_style=gnu-makefile
make_use_env=yes
hostmakedepends="python3 bison flex pkg-config clang git tcl readline"
makedepends="tcl-devel readline-devel libffi-devel"
depends="graphviz xdot"
short_desc="Verilog RTL Synthesis Suite"
maintainer="Jasper Chan <jasperchan515@gmail.com>"
license="GPL-3.0-or-later"
homepage="http://www.clifford.at/yosys/about.html"
distfiles="https://github.com/cliffordwolf/yosys/archive/yosys-${version}.tar.gz"
checksum=f2e31371f9cf1b36cb4f57b23fd6eb849adc7d935dcf49f3c905aa5136382c2f
pre_build() {
vsed -e "s,CXX = gcc,CXX = ${CC}," -e "s,LD = gcc, LD = ${CC}," -i Makefile
make config-gcc
}