779 lines
28 KiB
Diff
779 lines
28 KiB
Diff
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context.h
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/minidump/minidump_context.h
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context.h
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@@ -637,6 +637,41 @@ struct MinidumpContextMIPS64 {
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uint64_t fir;
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};
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+//! \brief 64bit RISC-V-specifc flags for MinidumpContextRISCV64::context_flags.
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+//! Based on minidump_cpu_riscv64.h from breakpad
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+enum MinidumpContextRISCV64Flags : uint32_t {
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+ //! \brief Identifies the context structure as RISCV64.
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+ kMinidumpContextRISCV64 = 0x00080000,
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+
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+ //! \brief Indicates the validity of integer registers.
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+ //!
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+ //! Registers `x1`-`x31` and pc are valid.
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+ kMinidumpContextRISCV64Integer = kMinidumpContextRISCV64 | 0x00000002,
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+
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+ //! \brief Indicates the validity of floating point registers.
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+ //!
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+ //! Floating point registers `f0`-`f31`, and `fcsr` are valid
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+ kMinidumpContextRISCV64FloatingPoint = kMinidumpContextRISCV64 | 0x00000004,
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+
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+ //! \brief Indicates the validity of all registers.
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+ kMinidumpContextRISCV64All = kMinidumpContextRISCV64Integer |
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+ kMinidumpContextRISCV64FloatingPoint,
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+};
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+
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+//! \brief A 64bit RISCV CPU context (register state) carried in a minidump file.
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+struct MinidumpContextRISCV64 {
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+ uint64_t context_flags;
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+
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+ //! \brief General purpose registers.
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+ uint64_t regs[32];
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+
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+ //! \brief FPU registers.
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+ uint64_t fpregs[32];
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+
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+ //! \brief FPU status register.
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+ uint64_t fcsr;
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+};
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+
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} // namespace crashpad
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#endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context_writer.cc
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@@ -102,6 +102,13 @@ MinidumpContextWriter::CreateFromSnapsho
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break;
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}
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+ case kCPUArchitectureRISCV64: {
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+ context = std::make_unique<MinidumpContextRISCV64Writer>();
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+ reinterpret_cast<MinidumpContextRISCV64Writer*>(context.get())
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+ ->InitializeFromSnapshot(context_snapshot->riscv64);
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+ break;
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+ }
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+
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default: {
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LOG(ERROR) << "unknown context architecture "
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<< context_snapshot->architecture;
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@@ -555,5 +562,42 @@ size_t MinidumpContextMIPS64Writer::Cont
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DCHECK_GE(state(), kStateFrozen);
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return sizeof(context_);
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}
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+
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+MinidumpContextRISCV64Writer::MinidumpContextRISCV64Writer()
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+ : MinidumpContextWriter(), context_() {
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+ context_.context_flags = kMinidumpContextRISCV64;
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+}
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+
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+MinidumpContextRISCV64Writer::~MinidumpContextRISCV64Writer() = default;
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+
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+void MinidumpContextRISCV64Writer::InitializeFromSnapshot(
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+ const CPUContextRISCV64* context_snapshot) {
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+ DCHECK_EQ(state(), kStateMutable);
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+ DCHECK_EQ(context_.context_flags, kMinidumpContextRISCV64);
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+
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+ context_.context_flags = kMinidumpContextRISCV64All;
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+
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+ static_assert(sizeof(context_.regs) == sizeof(context_snapshot->regs),
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+ "GPRs size mismatch");
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+ memcpy(context_.regs, context_snapshot->regs, sizeof(context_.regs));
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+
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+ static_assert(sizeof(context_.fpregs) == sizeof(context_snapshot->fpregs),
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+ "FPRs size mismatch");
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+ memcpy(context_.fpregs,
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+ context_snapshot->fpregs,
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+ sizeof(context_.fpregs));
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+ context_.fcsr = context_snapshot->fcsr;
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+}
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+
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+bool MinidumpContextRISCV64Writer::WriteObject(
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+ FileWriterInterface* file_writer) {
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+ DCHECK_EQ(state(), kStateWritable);
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+ return file_writer->Write(&context_, sizeof(context_));
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+}
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+
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+size_t MinidumpContextRISCV64Writer::ContextSize() const {
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+ DCHECK_GE(state(), kStateFrozen);
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+ return sizeof(context_);
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+}
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} // namespace crashpad
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_context_writer.h
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@@ -369,6 +369,49 @@ class MinidumpContextMIPS64Writer final
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MinidumpContextMIPS64 context_;
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};
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+//! \brief The writer for a MinidumpContextRISCV64 structure in a minidump file.
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+class MinidumpContextRISCV64Writer final : public MinidumpContextWriter {
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+ public:
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+ MinidumpContextRISCV64Writer();
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+
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+ MinidumpContextRISCV64Writer(const MinidumpContextRISCV64Writer&) = delete;
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+ MinidumpContextRISCV64Writer& operator=(const MinidumpContextRISCV64Writer&) =
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+ delete;
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+
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+ ~MinidumpContextRISCV64Writer() override;
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+
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+ //! \brief Initializes the MinidumpContextRISCV based on \a context_snapshot.
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+ //!
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+ //! \param[in] context_snapshot The context snapshot to use as source data.
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+ //!
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+ //! \note Valid in #kStateMutable. No mutation of context() may be done before
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+ //! calling this method, and it is not normally necessary to alter
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+ //! context() after calling this method.
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+ void InitializeFromSnapshot(const CPUContextRISCV64* context_snapshot);
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+
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+ //! \brief Returns a pointer to the context structure that this object will
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+ //! write.
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+ //!
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+ //! \attention This returns a non-`const` pointer to this object’s private
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+ //! data so that a caller can populate the context structure directly.
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+ //! This is done because providing setter interfaces to each field in the
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+ //! context structure would be unwieldy and cumbersome. Care must be taken
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+ //! to populate the context structure correctly. The context structure
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+ //! must only be modified while this object is in the #kStateMutable
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+ //! state.
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+ MinidumpContextRISCV64* context() { return &context_; }
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+
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+ protected:
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+ // MinidumpWritable:
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+ bool WriteObject(FileWriterInterface* file_writer) override;
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+
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+ // MinidumpContextWriter:
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+ size_t ContextSize() const override;
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+
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+ private:
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+ MinidumpContextRISCV64 context_;
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+};
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+
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} // namespace crashpad
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#endif // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_WRITER_H_
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/minidump/minidump_misc_info_writer.cc
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@@ -175,6 +175,10 @@ std::string MinidumpMiscInfoDebugBuildSt
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static constexpr char kCPU[] = "mips";
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#elif defined(ARCH_CPU_MIPS64EL)
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static constexpr char kCPU[] = "mips64";
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+#elif defined(ARCH_CPU_RISCV32)
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+ static constexpr char kCPU[] = "riscv32";
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+#elif defined(ARCH_CPU_RISCV64)
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+ static constexpr char kCPU[] = "riscv64";
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#else
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#error define kCPU for this CPU
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#endif
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/capture_memory.cc
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@@ -117,6 +117,16 @@ void CaptureMemory::PointedToByContext(c
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for (size_t i = 0; i < std::size(context.mipsel->regs); ++i) {
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MaybeCaptureMemoryAround(delegate, context.mipsel->regs[i]);
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}
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+#elif defined(ARCH_CPU_RISCV_FAMILY)
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+ if (context.architecture == kCPUArchitectureRISCV64) {
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+ for (size_t i = 0; i < std::size(context.riscv64->regs); ++i) {
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+ MaybeCaptureMemoryAround(delegate, context.riscv64->regs[i]);
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+ }
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+ } else {
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+ for (size_t i = 0; i < std::size(context.riscv32->regs); ++i) {
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+ MaybeCaptureMemoryAround(delegate, context.riscv32->regs[i]);
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+ }
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+ }
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#else
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#error Port.
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#endif
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_architecture.h
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@@ -43,7 +43,13 @@ enum CPUArchitecture {
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kCPUArchitectureMIPSEL,
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//! \brief 64-bit MIPSEL.
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- kCPUArchitectureMIPS64EL
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+ kCPUArchitectureMIPS64EL,
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+
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+ //! \brief 32-bit RISCV.
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+ kCPUArchitectureRISCV32,
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+
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+ //! \brief 64-bit RISCV.
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+ kCPUArchitectureRISCV64
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};
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} // namespace crashpad
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_context.cc
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@@ -226,10 +226,12 @@ bool CPUContext::Is64Bit() const {
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case kCPUArchitectureX86_64:
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case kCPUArchitectureARM64:
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case kCPUArchitectureMIPS64EL:
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+ case kCPUArchitectureRISCV64:
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return true;
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case kCPUArchitectureX86:
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case kCPUArchitectureARM:
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case kCPUArchitectureMIPSEL:
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+ case kCPUArchitectureRISCV32:
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return false;
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default:
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NOTREACHED();
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_context.h
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/cpu_context.h
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/cpu_context.h
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@@ -362,6 +362,20 @@ struct CPUContextMIPS64 {
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uint64_t fir;
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};
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+//! \brief A context structure carrying RISCV32 CPU state.
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+struct CPUContextRISCV32 {
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+ uint32_t regs[32];
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+ uint64_t fpregs[32];
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+ uint32_t fcsr;
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+};
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+
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+//! \brief A context structure carrying RISCV64 CPU state.
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+struct CPUContextRISCV64 {
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+ uint64_t regs[32];
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+ uint64_t fpregs[32];
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+ uint32_t fcsr;
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+};
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+
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//! \brief A context structure capable of carrying the context of any supported
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//! CPU architecture.
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struct CPUContext {
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@@ -402,6 +416,8 @@ struct CPUContext {
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CPUContextARM64* arm64;
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CPUContextMIPS* mipsel;
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CPUContextMIPS64* mips64;
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+ CPUContextRISCV32* riscv32;
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+ CPUContextRISCV64* riscv64;
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};
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};
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.cc
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@@ -266,6 +266,30 @@ void InitializeCPUContextARM64_OnlyFPSIM
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context->fpcr = float_context.fpcr;
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}
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+#elif defined(ARCH_CPU_RISCV_FAMILY)
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+
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+template <typename Traits>
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+void InitializeCPUContextRISCV(
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+ const typename Traits::SignalThreadContext& thread_context,
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+ const typename Traits::SignalFloatContext& float_context,
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+ typename Traits::CPUContext* context) {
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+ static_assert(sizeof(context->regs) == sizeof(thread_context),
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+ "registers size mismatch");
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+ static_assert(sizeof(context->fpregs) == sizeof(float_context.f),
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+ "fp registers size mismatch");
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+ memcpy(&context->regs, &thread_context, sizeof(context->regs));
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+ memcpy(&context->fpregs, &float_context.f, sizeof(context->fpregs));
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+ context->fcsr = float_context.fcsr;
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+}
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+template void InitializeCPUContextRISCV<ContextTraits32>(
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+ const ContextTraits32::SignalThreadContext& thread_context,
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+ const ContextTraits32::SignalFloatContext& float_context,
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+ ContextTraits32::CPUContext* context);
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+template void InitializeCPUContextRISCV<ContextTraits64>(
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+ const ContextTraits64::SignalThreadContext& thread_context,
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+ const ContextTraits64::SignalFloatContext& float_context,
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+ ContextTraits64::CPUContext* context);
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+
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#endif // ARCH_CPU_X86_FAMILY
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} // namespace internal
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/cpu_context_linux.h
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@@ -174,6 +174,22 @@ void InitializeCPUContextMIPS(
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#endif // ARCH_CPU_MIPS_FAMILY || DOXYGEN
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+#if defined(ARCH_CPU_RISCV_FAMILY) || DOXYGEN
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+
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+//! \brief Initializes a CPUContextRISCV structure from native context
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+//! structures on Linux.
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+//!
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+//! \param[in] thread_context The native thread context.
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+//! \param[in] float_context The native float context.
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+//! \param[out] context The CPUContextRISCV structure to initialize.
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+template <typename Traits>
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+void InitializeCPUContextRISCV(
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+ const typename Traits::SignalThreadContext& thread_context,
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+ const typename Traits::SignalFloatContext& float_context,
|
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+ typename Traits::CPUContext* context);
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+
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+#endif // ARCH_CPU_RISCV_FAMILY || DOXYGEN
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+
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} // namespace internal
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} // namespace crashpad
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
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===================================================================
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
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+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.cc
|
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@@ -325,6 +325,61 @@ bool ExceptionSnapshotLinux::ReadContext
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reader, context_address, context_.mips64);
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}
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+#elif defined(ARCH_CPU_RISCV_FAMILY)
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+
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+template <typename Traits>
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+static bool ReadContext(ProcessReaderLinux* reader,
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+ LinuxVMAddress context_address,
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+ typename Traits::CPUContext* dest_context) {
|
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+ const ProcessMemory* memory = reader->Memory();
|
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+
|
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+ LinuxVMAddress gregs_address = context_address +
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+ offsetof(UContext<Traits>, mcontext) +
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+ offsetof(typename Traits::MContext, gregs);
|
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+
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+ typename Traits::SignalThreadContext thread_context;
|
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+ if (!memory->Read(gregs_address, sizeof(thread_context), &thread_context)) {
|
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+ LOG(ERROR) << "Couldn't read gregs";
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+ return false;
|
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+ }
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+
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+ LinuxVMAddress fpregs_address = context_address +
|
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+ offsetof(UContext<Traits>, mcontext) +
|
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+ offsetof(typename Traits::MContext, fpregs);
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+
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+ typename Traits::SignalFloatContext fp_context;
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+ if (!memory->Read(fpregs_address, sizeof(fp_context), &fp_context)) {
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+ LOG(ERROR) << "Couldn't read fpregs";
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+ return false;
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+ }
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+
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+ InitializeCPUContextRISCV<Traits>(thread_context, fp_context, dest_context);
|
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+
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+ return true;
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+}
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+
|
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+template <>
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+bool ExceptionSnapshotLinux::ReadContext<ContextTraits32>(
|
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+ ProcessReaderLinux* reader,
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+ LinuxVMAddress context_address) {
|
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+ context_.architecture = kCPUArchitectureRISCV32;
|
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+ context_.riscv32 = &context_union_.riscv32;
|
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+
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+ return internal::ReadContext<ContextTraits32>(
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+ reader, context_address, context_.riscv32);
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+}
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+
|
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+template <>
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+bool ExceptionSnapshotLinux::ReadContext<ContextTraits64>(
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+ ProcessReaderLinux* reader,
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+ LinuxVMAddress context_address) {
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+ context_.architecture = kCPUArchitectureRISCV64;
|
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+ context_.riscv64 = &context_union_.riscv64;
|
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+
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+ return internal::ReadContext<ContextTraits64>(
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+ reader, context_address, context_.riscv64);
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+}
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+
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#endif // ARCH_CPU_X86_FAMILY
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|
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bool ExceptionSnapshotLinux::Initialize(
|
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
|
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===================================================================
|
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/exception_snapshot_linux.h
|
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@@ -89,6 +89,9 @@ class ExceptionSnapshotLinux final : pub
|
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#elif defined(ARCH_CPU_MIPS_FAMILY)
|
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CPUContextMIPS mipsel;
|
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CPUContextMIPS64 mips64;
|
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+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
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+ CPUContextRISCV32 riscv32;
|
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+ CPUContextRISCV64 riscv64;
|
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#endif
|
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} context_union_;
|
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CPUContext context_;
|
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Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
|
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===================================================================
|
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--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/process_reader_linux.cc
|
||
@@ -127,6 +127,9 @@ void ProcessReaderLinux::Thread::Initial
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.regs[29]
|
||
: thread_info.thread_context.t32.regs[29];
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ stack_pointer = reader->Is64Bit() ? thread_info.thread_context.t64.sp
|
||
+ : thread_info.thread_context.t32.sp;
|
||
#else
|
||
#error Port.
|
||
#endif
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/signal_context.h
|
||
@@ -422,6 +422,67 @@ static_assert(offsetof(UContext<ContextT
|
||
"context offset mismatch");
|
||
#endif
|
||
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+
|
||
+struct MContext32 {
|
||
+ uint32_t gregs[32];
|
||
+ uint64_t fpregs[32];
|
||
+ unsigned int fcsr;
|
||
+};
|
||
+
|
||
+struct MContext64 {
|
||
+ uint64_t gregs[32];
|
||
+ uint64_t fpregs[32];
|
||
+ unsigned int fcsr;
|
||
+};
|
||
+
|
||
+struct ContextTraits32 : public Traits32 {
|
||
+ using MContext = MContext32;
|
||
+ using SignalThreadContext = ThreadContext::t32_t;
|
||
+ using SignalFloatContext = FloatContext::f32_t;
|
||
+ using CPUContext = CPUContextRISCV32;
|
||
+};
|
||
+
|
||
+struct ContextTraits64 : public Traits64 {
|
||
+ using MContext = MContext64;
|
||
+ using SignalThreadContext = ThreadContext::t64_t;
|
||
+ using SignalFloatContext = FloatContext::f64_t;
|
||
+ using CPUContext = CPUContextRISCV64;
|
||
+};
|
||
+
|
||
+template <typename Traits>
|
||
+struct UContext {
|
||
+ typename Traits::ULong flags;
|
||
+ typename Traits::Address link;
|
||
+ SignalStack<Traits> stack;
|
||
+ Sigset<Traits> sigmask;
|
||
+ char padding[128 - sizeof(sigmask)];
|
||
+ typename Traits::Char_64Only padding2[8];
|
||
+ typename Traits::MContext mcontext;
|
||
+};
|
||
+
|
||
+#if defined(ARCH_CPU_RISCV32)
|
||
+static_assert(offsetof(UContext<ContextTraits32>, mcontext) ==
|
||
+ offsetof(ucontext_t, uc_mcontext),
|
||
+ "context offset mismatch");
|
||
+static_assert(offsetof(UContext<ContextTraits32>, mcontext.gregs) ==
|
||
+ offsetof(ucontext_t, uc_mcontext.__gregs),
|
||
+ "context offset mismatch");
|
||
+static_assert(offsetof(UContext<ContextTraits32>, mcontext.fpregs) ==
|
||
+ offsetof(ucontext_t, uc_mcontext.__fpregs),
|
||
+ "context offset mismatch");
|
||
+#elif defined(ARCH_CPU_RISCV64)
|
||
+static_assert(offsetof(UContext<ContextTraits64>, mcontext) ==
|
||
+ offsetof(ucontext_t, uc_mcontext),
|
||
+ "context offset mismatch");
|
||
+static_assert(offsetof(UContext<ContextTraits64>, mcontext.gregs) ==
|
||
+ offsetof(ucontext_t, uc_mcontext.__gregs),
|
||
+ "context offset mismatch");
|
||
+static_assert(offsetof(UContext<ContextTraits64>, mcontext.fpregs) ==
|
||
+ offsetof(ucontext_t, uc_mcontext.__fpregs),
|
||
+ "context offset mismatch");
|
||
+#endif
|
||
+
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/system_snapshot_linux.cc
|
||
@@ -205,6 +205,9 @@ CPUArchitecture SystemSnapshotLinux::Get
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
return process_reader_->Is64Bit() ? kCPUArchitectureMIPS64EL
|
||
: kCPUArchitectureMIPSEL;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ return process_reader_->Is64Bit() ? kCPUArchitectureRISCV64
|
||
+ : kCPUArchitectureRISCV32;
|
||
#else
|
||
#error port to your architecture
|
||
#endif
|
||
@@ -220,6 +223,9 @@ uint32_t SystemSnapshotLinux::CPURevisio
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
// Not implementable on MIPS
|
||
return 0;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ // Not implementable on RISCV
|
||
+ return 0;
|
||
#else
|
||
#error port to your architecture
|
||
#endif
|
||
@@ -240,6 +246,9 @@ std::string SystemSnapshotLinux::CPUVend
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
// Not implementable on MIPS
|
||
return std::string();
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ // Not implementable on RISCV
|
||
+ return std::string();
|
||
#else
|
||
#error port to your architecture
|
||
#endif
|
||
@@ -373,6 +382,9 @@ bool SystemSnapshotLinux::NXEnabled() co
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
// Not implementable on MIPS
|
||
return false;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ // Not implementable on RISCV
|
||
+ return false;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.cc
|
||
@@ -190,6 +190,22 @@ bool ThreadSnapshotLinux::Initialize(
|
||
thread.thread_info.float_context.f32,
|
||
context_.mipsel);
|
||
}
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ if (process_reader->Is64Bit()) {
|
||
+ context_.architecture = kCPUArchitectureRISCV64;
|
||
+ context_.riscv64 = &context_union_.riscv64;
|
||
+ InitializeCPUContextRISCV<ContextTraits64>(
|
||
+ thread.thread_info.thread_context.t64,
|
||
+ thread.thread_info.float_context.f64,
|
||
+ context_.riscv64);
|
||
+ } else {
|
||
+ context_.architecture = kCPUArchitectureRISCV32;
|
||
+ context_.riscv32 = &context_union_.riscv32;
|
||
+ InitializeCPUContextRISCV<ContextTraits32>(
|
||
+ thread.thread_info.thread_context.t32,
|
||
+ thread.thread_info.float_context.f32,
|
||
+ context_.riscv32);
|
||
+ }
|
||
#else
|
||
#error Port.
|
||
#endif
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/snapshot/linux/thread_snapshot_linux.h
|
||
@@ -74,6 +74,9 @@ class ThreadSnapshotLinux final : public
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
CPUContextMIPS mipsel;
|
||
CPUContextMIPS64 mips64;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ CPUContextRISCV32 riscv32;
|
||
+ CPUContextRISCV64 riscv64;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/util/linux/ptracer.cc
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/util/linux/ptracer.cc
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/util/linux/ptracer.cc
|
||
@@ -398,6 +398,51 @@ bool GetThreadArea64(pid_t tid,
|
||
return true;
|
||
}
|
||
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+
|
||
+template <typename Destination>
|
||
+bool GetRegisterSet(pid_t tid, int set, Destination* dest, bool can_log) {
|
||
+ iovec iov;
|
||
+ iov.iov_base = dest;
|
||
+ iov.iov_len = sizeof(*dest);
|
||
+ if (ptrace(PTRACE_GETREGSET, tid, reinterpret_cast<void*>(set), &iov) != 0) {
|
||
+ PLOG_IF(ERROR, can_log) << "ptrace";
|
||
+ return false;
|
||
+ }
|
||
+ if (iov.iov_len != sizeof(*dest)) {
|
||
+ LOG_IF(ERROR, can_log) << "Unexpected registers size";
|
||
+ return false;
|
||
+ }
|
||
+ return true;
|
||
+}
|
||
+
|
||
+bool GetFloatingPointRegisters32(pid_t tid,
|
||
+ FloatContext* context,
|
||
+ bool can_log) {
|
||
+ return false;
|
||
+}
|
||
+
|
||
+bool GetFloatingPointRegisters64(pid_t tid,
|
||
+ FloatContext* context,
|
||
+ bool can_log) {
|
||
+ return GetRegisterSet(tid, NT_PRFPREG, &context->f64.f, can_log);
|
||
+}
|
||
+
|
||
+bool GetThreadArea32(pid_t tid,
|
||
+ const ThreadContext& context,
|
||
+ LinuxVMAddress* address,
|
||
+ bool can_log) {
|
||
+ return false;
|
||
+}
|
||
+
|
||
+bool GetThreadArea64(pid_t tid,
|
||
+ const ThreadContext& context,
|
||
+ LinuxVMAddress* address,
|
||
+ bool can_log) {
|
||
+ *address = context.t64.tp;
|
||
+ return true;
|
||
+}
|
||
+
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/util/linux/thread_info.h
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/util/linux/thread_info.h
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/util/linux/thread_info.h
|
||
@@ -79,6 +79,40 @@ union ThreadContext {
|
||
uint32_t cp0_status;
|
||
uint32_t cp0_cause;
|
||
uint32_t padding1_;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ // Reflects user_regs_struct in asm/ptrace.h.
|
||
+ uint32_t pc;
|
||
+ uint32_t ra;
|
||
+ uint32_t sp;
|
||
+ uint32_t gp;
|
||
+ uint32_t tp;
|
||
+ uint32_t t0;
|
||
+ uint32_t t1;
|
||
+ uint32_t t2;
|
||
+ uint32_t s0;
|
||
+ uint32_t s1;
|
||
+ uint32_t a0;
|
||
+ uint32_t a1;
|
||
+ uint32_t a2;
|
||
+ uint32_t a3;
|
||
+ uint32_t a4;
|
||
+ uint32_t a5;
|
||
+ uint32_t a6;
|
||
+ uint32_t a7;
|
||
+ uint32_t s2;
|
||
+ uint32_t s3;
|
||
+ uint32_t s4;
|
||
+ uint32_t s5;
|
||
+ uint32_t s6;
|
||
+ uint32_t s7;
|
||
+ uint32_t s8;
|
||
+ uint32_t s9;
|
||
+ uint32_t s10;
|
||
+ uint32_t s11;
|
||
+ uint32_t t3;
|
||
+ uint32_t t4;
|
||
+ uint32_t t5;
|
||
+ uint32_t t6;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
@@ -132,6 +166,40 @@ union ThreadContext {
|
||
uint64_t cp0_badvaddr;
|
||
uint64_t cp0_status;
|
||
uint64_t cp0_cause;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ // Reflects user_regs_struct in asm/ptrace.h.
|
||
+ uint64_t pc;
|
||
+ uint64_t ra;
|
||
+ uint64_t sp;
|
||
+ uint64_t gp;
|
||
+ uint64_t tp;
|
||
+ uint64_t t0;
|
||
+ uint64_t t1;
|
||
+ uint64_t t2;
|
||
+ uint64_t s0;
|
||
+ uint64_t s1;
|
||
+ uint64_t a0;
|
||
+ uint64_t a1;
|
||
+ uint64_t a2;
|
||
+ uint64_t a3;
|
||
+ uint64_t a4;
|
||
+ uint64_t a5;
|
||
+ uint64_t a6;
|
||
+ uint64_t a7;
|
||
+ uint64_t s2;
|
||
+ uint64_t s3;
|
||
+ uint64_t s4;
|
||
+ uint64_t s5;
|
||
+ uint64_t s6;
|
||
+ uint64_t s7;
|
||
+ uint64_t s8;
|
||
+ uint64_t s9;
|
||
+ uint64_t s10;
|
||
+ uint64_t s11;
|
||
+ uint64_t t3;
|
||
+ uint64_t t4;
|
||
+ uint64_t t5;
|
||
+ uint64_t t6;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
@@ -143,11 +211,12 @@ union ThreadContext {
|
||
using NativeThreadContext = user_regs;
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
// No appropriate NativeThreadsContext type available for MIPS
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY || ARCH_CPU_ARM64
|
||
|
||
-#if !defined(ARCH_CPU_MIPS_FAMILY)
|
||
+#if !defined(ARCH_CPU_MIPS_FAMILY) && !defined(ARCH_CPU_RISCV_FAMILY)
|
||
#if defined(ARCH_CPU_32_BITS)
|
||
static_assert(sizeof(t32_t) == sizeof(NativeThreadContext), "Size mismatch");
|
||
#else // ARCH_CPU_64_BITS
|
||
@@ -218,6 +287,9 @@ union FloatContext {
|
||
} fpregs[32];
|
||
uint32_t fpcsr;
|
||
uint32_t fpu_id;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ uint64_t f[32];
|
||
+ uint32_t fcsr;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
@@ -252,6 +324,9 @@ union FloatContext {
|
||
double fpregs[32];
|
||
uint32_t fpcsr;
|
||
uint32_t fpu_id;
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
+ uint64_t f[32];
|
||
+ uint32_t fcsr;
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86_FAMILY
|
||
@@ -281,6 +356,7 @@ union FloatContext {
|
||
static_assert(sizeof(f64) == sizeof(user_fpsimd_struct), "Size mismatch");
|
||
#elif defined(ARCH_CPU_MIPS_FAMILY)
|
||
// No appropriate floating point context native type for available MIPS.
|
||
+#elif defined(ARCH_CPU_RISCV_FAMILY)
|
||
#else
|
||
#error Port.
|
||
#endif // ARCH_CPU_X86
|
||
Index: chromium-106.0.5249.91/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
||
===================================================================
|
||
--- chromium-106.0.5249.91.orig/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
||
+++ chromium-106.0.5249.91/third_party/crashpad/crashpad/util/net/http_transport_libcurl.cc
|
||
@@ -237,6 +237,8 @@ std::string UserAgent() {
|
||
#elif defined(ARCH_CPU_BIG_ENDIAN)
|
||
static constexpr char arch[] = "aarch64_be";
|
||
#endif
|
||
+#elif defined(ARCH_CPU_RISCV64)
|
||
+ static constexpr char arch[] = "riscv64";
|
||
#else
|
||
#error Port
|
||
#endif
|
||
|