void-packages/srcpkgs/qt6-webengine/patches/0004-riscv-angle.patch

29 lines
1.3 KiB
Diff

Index: chromium-111.0.5563.64/third_party/angle/gni/angle.gni
===================================================================
--- chromium-111.0.5563.64.orig/third_party/angle/gni/angle.gni
+++ chromium-111.0.5563.64/third_party/angle/gni/angle.gni
@@ -105,7 +105,8 @@ declare_args() {
if (current_cpu == "arm64" || current_cpu == "x64" ||
current_cpu == "mips64el" || current_cpu == "s390x" ||
- current_cpu == "ppc64" || current_cpu == "loong64") {
+ current_cpu == "ppc64" || current_cpu == "loong64" ||
+ current_cpu == "riscv64") {
angle_64bit_current_cpu = true
} else if (current_cpu == "arm" || current_cpu == "x86" ||
current_cpu == "mipsel" || current_cpu == "s390" ||
Index: chromium-111.0.5563.64/third_party/angle/src/common/platform.h
===================================================================
--- chromium-111.0.5563.64.orig/third_party/angle/src/common/platform.h
+++ chromium-111.0.5563.64/third_party/angle/src/common/platform.h
@@ -108,7 +108,7 @@
#endif
// Mips and arm devices need to include stddef for size_t.
-#if defined(__mips__) || defined(__arm__) || defined(__aarch64__)
+#if defined(__mips__) || defined(__arm__) || defined(__aarch64__) || defined(__riscv)
# include <stddef.h>
#endif