131 lines
4.8 KiB
Diff
131 lines
4.8 KiB
Diff
--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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@@ -145,8 +145,7 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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if (isDarwin())
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HasLazyResolverStubs = true;
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- if (TargetTriple.isOSNetBSD() || TargetTriple.isOSOpenBSD() ||
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- TargetTriple.isMusl())
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+ if (TargetTriple.isOSNetBSD() || TargetTriple.isOSOpenBSD() || isTargetLinux())
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SecurePlt = true;
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if (HasSPE && IsPPC64)
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--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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@@ -4941,7 +4945,8 @@ PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain,
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if (auto *G = dyn_cast<GlobalAddressSDNode>(Callee))
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GV = G->getGlobal();
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bool Local = TM.shouldAssumeDSOLocal(*Mod, GV);
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- bool UsePlt = !Local && Subtarget.isTargetELF() && !isPPC64;
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+ bool UsePlt = !Local && Subtarget.isTargetELF() && !isPPC64 &&
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+ TM.isPositionIndependent();
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if (isFunctionGlobalAddress(Callee)) {
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GlobalAddressSDNode *G = cast<GlobalAddressSDNode>(Callee);
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--- llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
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+++ llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
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@@ -62,7 +62,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 328(1)
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; CHECK-NEXT: fmr 1, 31
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; CHECK-NEXT: fmr 2, 30
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-; CHECK-NEXT: bl __gcc_qmul@PLT
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+; CHECK-NEXT: bl __gcc_qmul
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; CHECK-NEXT: lis 3, 16864
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; CHECK-NEXT: stfd 1, 280(1)
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; CHECK-NEXT: fmr 29, 1
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@@ -84,7 +84,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 360(1)
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; CHECK-NEXT: lfd 1, 352(1)
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; CHECK-NEXT: lfd 2, 344(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_1@ha
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@@ -117,7 +117,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: .LBB0_5: # %bb1
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; CHECK-NEXT: li 4, 0
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; CHECK-NEXT: mr 3, 30
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-; CHECK-NEXT: bl __floatditf@PLT
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+; CHECK-NEXT: bl __floatditf
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; CHECK-NEXT: lis 3, 17392
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; CHECK-NEXT: stfd 1, 208(1)
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; CHECK-NEXT: fmr 29, 1
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@@ -140,7 +140,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 232(1)
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; CHECK-NEXT: lfd 1, 224(1)
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; CHECK-NEXT: lfd 2, 216(1)
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-; CHECK-NEXT: bl __gcc_qadd@PLT
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+; CHECK-NEXT: bl __gcc_qadd
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; CHECK-NEXT: blt 2, .LBB0_7
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; CHECK-NEXT: # %bb.6: # %bb1
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; CHECK-NEXT: fmr 2, 28
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@@ -163,7 +163,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: stw 3, 248(1)
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; CHECK-NEXT: lfd 3, 256(1)
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; CHECK-NEXT: lfd 4, 248(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: stfd 2, 176(1)
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; CHECK-NEXT: fcmpu 0, 2, 27
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; CHECK-NEXT: stfd 1, 168(1)
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@@ -205,7 +205,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 72(1)
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; CHECK-NEXT: lfd 1, 64(1)
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; CHECK-NEXT: lfd 2, 56(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_2@ha
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@@ -260,7 +260,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 136(1)
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; CHECK-NEXT: lfd 1, 128(1)
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; CHECK-NEXT: lfd 2, 120(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_0@ha
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--- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
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+++ llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
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@@ -11,7 +11,7 @@ entry:
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; CHECK-DAG: ori [[T2:[0-9]+]], [[T2]], 34492
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; CHECK-DAG: stwx [[T1]], 1, [[T2]]
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; CHECK-DAG: addi 3, 1, 28
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-; CHECK: bl bar@PLT
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+; CHECK: bl bar
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%x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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%x1 = bitcast [100000 x i8]* %x to i8* ; <i8*> [#uses=1]
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--- llvm/test/CodeGen/PowerPC/available-externally.ll
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+++ llvm/test/CodeGen/PowerPC/available-externally.ll
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@@ -14,7 +14,7 @@ target triple = "powerpc-unknown-linux-gnu"
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define i32 @foo(i64 %x) nounwind {
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entry:
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; STATIC: foo:
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-; STATIC: bl exact_log2@PLT
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+; STATIC: bl exact_log2
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; STATIC: blr
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; PIC: foo:
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--- llvm/test/CodeGen/PowerPC/stubs.ll
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+++ llvm/test/CodeGen/PowerPC/stubs.ll
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@@ -6,4 +6,4 @@ entry:
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}
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; CHECK: test1:
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-; CHECK: bl __floatditf@PLT
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+; CHECK: bl __floatditf
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--- llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
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+++ llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
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@@ -72,7 +72,7 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
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; PPC32-NEXT: mr 28, 9
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; PPC32-NEXT: mr 23, 6
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; PPC32-NEXT: mr 24, 5
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-; PPC32-NEXT: bl __multi3@PLT
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+; PPC32-NEXT: bl __multi3
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; PPC32-NEXT: mr 7, 4
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; PPC32-NEXT: mullw 4, 24, 30
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; PPC32-NEXT: mullw 8, 29, 23
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