33 lines
1.3 KiB
Diff
33 lines
1.3 KiB
Diff
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commit d282719a9c2fb0ee32830aa75b8dfbb9392954ed
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Author: Jerome Glisse <jglisse@redhat.com>
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Date: Wed Apr 4 17:08:30 2012 -0400
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r6xx-r9xx: force 1D tiling for buffer with height < 64
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Due to some old kernel issue, height is 8 aligned insided the ddx
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For buffer with height btw 57 & 63 this lead ddx to believe it can
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allocate a 2D tiled surface while mesa will not align height and
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will assume 1D tiled leading to disagreement and rendering issue.
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This patch force buffer with height < 64 to be 1D tiled.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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diff --git a/src/radeon_exa.c b/src/radeon_exa.c
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index 99a5806..270dad4 100644
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--- a/src/radeon_exa.c
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+++ b/src/radeon_exa.c
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@@ -511,6 +511,13 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height,
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surface.last_level = 0;
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surface.bpe = cpp;
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surface.nsamples = 1;
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+ if (height < 64) {
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+ /* disable 2d tiling for small surface to work around
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+ * the fact that ddx align height to 8 pixel for old
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+ * obscure reason i can't remember
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+ */
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+ tiling &= ~RADEON_TILING_MACRO;
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+ }
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surface.flags = RADEON_SURF_SCANOUT;
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surface.flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
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surface.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR, MODE);
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