2019-02-17 03:09:22 +01:00
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# Template file for 'yosys'
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pkgname=yosys
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version=0.8
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revision=1
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wrksrc=${pkgname}-${pkgname}-${version}
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build_style=gnu-makefile
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make_use_env=yes
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hostmakedepends="python3 bison flex pkg-config clang git tcl"
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makedepends="tcl-devel readline-devel libffi-devel"
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depends="graphviz xdot"
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short_desc="Verilog RTL Synthesis Suite"
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maintainer="Jasper Chan <jasperchan515@gmail.com>"
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license="GPL-3.0-or-later"
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homepage="http://www.clifford.at/yosys/about.html"
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distfiles="https://github.com/cliffordwolf/yosys/archive/yosys-${version}.tar.gz"
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checksum=07760fe732003585b26d97f9e02bcddf242ff7fc33dbd415446ac7c70e85c66f
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pre_build() {
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2019-02-20 13:48:07 +01:00
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vsed -e "s,CXX = gcc,CXX = ${CC}," -e "s,LD = gcc, LD = ${CC}," -i Makefile
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2019-02-17 03:09:22 +01:00
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make config-gcc
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}
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